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Rename port assignments to port mappings

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This commit is contained in:
Jeremy Stretch
2025-11-26 09:56:42 -05:00
parent 81858388de
commit b993ec978a
26 changed files with 353 additions and 354 deletions
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netbox/dcim/api/serializers_/device_components.py
+29 -29
View File
@@ -5,7 +5,7 @@ from rest_framework import serializers
from dcim.choices import *
from dcim.constants import *
from dcim.models import (
ConsolePort, ConsoleServerPort, DeviceBay, FrontPort, Interface, InventoryItem, ModuleBay, PortAssignment,
ConsolePort, ConsoleServerPort, DeviceBay, FrontPort, Interface, InventoryItem, ModuleBay, PortMapping,
PowerOutlet, PowerPort, RearPort, VirtualDeviceContext,
)
from ipam.api.serializers_.vlans import VLANSerializer, VLANTranslationPolicySerializer
@@ -294,7 +294,7 @@ class InterfaceSerializer(NetBoxModelSerializer, CabledObjectSerializer, Connect
return super().validate(data)
class RearPortAssignmentSerializer(serializers.ModelSerializer):
class RearPortMappingSerializer(serializers.ModelSerializer):
position = serializers.IntegerField(
source='rear_port_position'
)
@@ -303,7 +303,7 @@ class RearPortAssignmentSerializer(serializers.ModelSerializer):
)
class Meta:
model = PortAssignment
model = PortMapping
fields = ('position', 'front_port', 'front_port_position')
@@ -316,8 +316,8 @@ class RearPortSerializer(NetBoxModelSerializer, CabledObjectSerializer):
allow_null=True
)
type = ChoiceField(choices=PortTypeChoices)
front_ports = RearPortAssignmentSerializer(
source='assignments',
front_ports = RearPortMappingSerializer(
source='mappings',
many=True,
required=False,
)
@@ -332,29 +332,29 @@ class RearPortSerializer(NetBoxModelSerializer, CabledObjectSerializer):
brief_fields = ('id', 'url', 'display', 'device', 'name', 'description', 'cable', '_occupied')
def create(self, validated_data):
assignments = validated_data.pop('assignments', [])
mappings = validated_data.pop('mappings', [])
instance = super().create(validated_data)
# Create FrontPort assignments
for assignment_data in assignments:
PortAssignment.objects.create(rear_port=instance, **assignment_data)
# Create FrontPort mappings
for attrs in mappings:
PortMapping.objects.create(rear_port=instance, **attrs)
return instance
def update(self, instance, validated_data):
assignments = validated_data.pop('assignments', None)
mappings = validated_data.pop('mappings', None)
instance = super().update(instance, validated_data)
if assignments is not None:
# Update FrontPort assignments
PortAssignment.objects.filter(rear_port=instance).delete()
for assignment_data in assignments:
PortAssignment.objects.create(rear_port=instance, **assignment_data)
if mappings is not None:
# Update FrontPort mappings
PortMapping.objects.filter(rear_port=instance).delete()
for attrs in mappings:
PortMapping.objects.create(rear_port=instance, **attrs)
return instance
class FrontPortAssignmentSerializer(serializers.ModelSerializer):
class FrontPortMappingSerializer(serializers.ModelSerializer):
position = serializers.IntegerField(
source='front_port_position'
)
@@ -363,7 +363,7 @@ class FrontPortAssignmentSerializer(serializers.ModelSerializer):
)
class Meta:
model = PortAssignment
model = PortMapping
fields = ('position', 'rear_port', 'rear_port_position')
@@ -376,8 +376,8 @@ class FrontPortSerializer(NetBoxModelSerializer, CabledObjectSerializer):
allow_null=True
)
type = ChoiceField(choices=PortTypeChoices)
rear_ports = FrontPortAssignmentSerializer(
source='assignments',
rear_ports = FrontPortMappingSerializer(
source='mappings',
many=True,
required=False,
)
@@ -392,24 +392,24 @@ class FrontPortSerializer(NetBoxModelSerializer, CabledObjectSerializer):
brief_fields = ('id', 'url', 'display', 'device', 'name', 'description', 'cable', '_occupied')
def create(self, validated_data):
assignments = validated_data.pop('assignments', [])
mappings = validated_data.pop('mappings', [])
instance = super().create(validated_data)
# Create RearPort assignments
for assignment_data in assignments:
PortAssignment.objects.create(front_port=instance, **assignment_data)
# Create RearPort mappings
for attrs in mappings:
PortMapping.objects.create(front_port=instance, **attrs)
return instance
def update(self, instance, validated_data):
assignments = validated_data.pop('assignments', None)
mappings = validated_data.pop('mappings', None)
instance = super().update(instance, validated_data)
if assignments is not None:
# Update RearPort assignments
PortAssignment.objects.filter(front_port=instance).delete()
for assignment_data in assignments:
PortAssignment.objects.create(front_port=instance, **assignment_data)
if mappings is not None:
# Update RearPort mappings
PortMapping.objects.filter(front_port=instance).delete()
for attrs in mappings:
PortMapping.objects.create(front_port=instance, **attrs)
return instance
netbox/dcim/api/serializers_/devicetype_components.py
+28 -28
View File
@@ -5,7 +5,7 @@ from dcim.choices import *
from dcim.constants import *
from dcim.models import (
ConsolePortTemplate, ConsoleServerPortTemplate, DeviceBayTemplate, FrontPortTemplate, InterfaceTemplate,
InventoryItemTemplate, ModuleBayTemplate, PortAssignmentTemplate, PowerOutletTemplate, PowerPortTemplate,
InventoryItemTemplate, ModuleBayTemplate, PortTemplateMapping, PowerOutletTemplate, PowerPortTemplate,
RearPortTemplate,
)
from netbox.api.fields import ChoiceField, ContentTypeField
@@ -206,7 +206,7 @@ class InterfaceTemplateSerializer(ComponentTemplateSerializer):
brief_fields = ('id', 'url', 'display', 'name', 'description')
class RearPortTemplateAssignmentSerializer(serializers.ModelSerializer):
class RearPortTemplateMappingSerializer(serializers.ModelSerializer):
position = serializers.IntegerField(
source='rear_port_position'
)
@@ -215,7 +215,7 @@ class RearPortTemplateAssignmentSerializer(serializers.ModelSerializer):
)
class Meta:
model = PortAssignmentTemplate
model = PortTemplateMapping
fields = ('position', 'front_port', 'front_port_position')
@@ -233,8 +233,8 @@ class RearPortTemplateSerializer(ComponentTemplateSerializer):
default=None
)
type = ChoiceField(choices=PortTypeChoices)
front_ports = RearPortTemplateAssignmentSerializer(
source='assignments',
front_ports = RearPortTemplateMappingSerializer(
source='mappings',
many=True,
required=False,
)
@@ -248,29 +248,29 @@ class RearPortTemplateSerializer(ComponentTemplateSerializer):
brief_fields = ('id', 'url', 'display', 'name', 'description')
def create(self, validated_data):
assignments = validated_data.pop('assignments', [])
mappings = validated_data.pop('mappings', [])
instance = super().create(validated_data)
# Create FrontPort assignments
for assignment_data in assignments:
PortAssignmentTemplate.objects.create(rear_port=instance, **assignment_data)
# Create FrontPort mappings
for attrs in mappings:
PortTemplateMapping.objects.create(rear_port=instance, **attrs)
return instance
def update(self, instance, validated_data):
assignments = validated_data.pop('assignments', None)
mappings = validated_data.pop('mappings', None)
instance = super().update(instance, validated_data)
if assignments is not None:
# Update FrontPort assignments
PortAssignmentTemplate.objects.filter(rear_port=instance).delete()
for assignment_data in assignments:
PortAssignmentTemplate.objects.create(rear_port=instance, **assignment_data)
if mappings is not None:
# Update FrontPort mappings
PortTemplateMapping.objects.filter(rear_port=instance).delete()
for attrs in mappings:
PortTemplateMapping.objects.create(rear_port=instance, **attrs)
return instance
class FrontPortTemplateAssignmentSerializer(serializers.ModelSerializer):
class FrontPortTemplateMappingSerializer(serializers.ModelSerializer):
position = serializers.IntegerField(
source='front_port_position'
)
@@ -279,7 +279,7 @@ class FrontPortTemplateAssignmentSerializer(serializers.ModelSerializer):
)
class Meta:
model = PortAssignmentTemplate
model = PortTemplateMapping
fields = ('position', 'rear_port', 'rear_port_position')
@@ -297,8 +297,8 @@ class FrontPortTemplateSerializer(ComponentTemplateSerializer):
default=None
)
type = ChoiceField(choices=PortTypeChoices)
rear_ports = FrontPortTemplateAssignmentSerializer(
source='assignments',
rear_ports = FrontPortTemplateMappingSerializer(
source='mappings',
many=True,
required=False,
)
@@ -312,24 +312,24 @@ class FrontPortTemplateSerializer(ComponentTemplateSerializer):
brief_fields = ('id', 'url', 'display', 'name', 'description')
def create(self, validated_data):
assignments = validated_data.pop('assignments', [])
mappings = validated_data.pop('mappings', [])
instance = super().create(validated_data)
# Create RearPort assignments
for assignment_data in assignments:
PortAssignmentTemplate.objects.create(front_port=instance, **assignment_data)
# Create RearPort mappings
for attrs in mappings:
PortTemplateMapping.objects.create(front_port=instance, **attrs)
return instance
def update(self, instance, validated_data):
assignments = validated_data.pop('assignments', None)
mappings = validated_data.pop('mappings', None)
instance = super().update(instance, validated_data)
if assignments is not None:
if mappings is not None:
# Update RearPort assignments
PortAssignmentTemplate.objects.filter(front_port=instance).delete()
for assignment_data in assignments:
PortAssignmentTemplate.objects.create(front_port=instance, **assignment_data)
PortTemplateMapping.objects.filter(front_port=instance).delete()
for attrs in mappings:
PortTemplateMapping.objects.create(front_port=instance, **attrs)
return instance
netbox/dcim/filtersets.py
+4 -4
View File
@@ -885,7 +885,7 @@ class FrontPortTemplateFilterSet(ChangeLoggedModelFilterSet, ModularDeviceTypeCo
null_value=None
)
rear_port_id = django_filters.ModelMultipleChoiceFilter(
field_name='assignments__rear_port',
field_name='mappings__rear_port',
queryset=RearPort.objects.all(),
to_field_name='rear_port',
label=_('Rear port (ID)'),
@@ -902,7 +902,7 @@ class RearPortTemplateFilterSet(ChangeLoggedModelFilterSet, ModularDeviceTypeCom
null_value=None
)
front_port_id = django_filters.ModelMultipleChoiceFilter(
field_name='assignments__front_port',
field_name='mappings__front_port',
queryset=FrontPort.objects.all(),
to_field_name='front_port',
label=_('Front port (ID)'),
@@ -2111,7 +2111,7 @@ class FrontPortFilterSet(ModularDeviceComponentFilterSet, CabledObjectFilterSet)
null_value=None
)
rear_port_id = django_filters.ModelMultipleChoiceFilter(
field_name='assignments__rear_port',
field_name='mappings__rear_port',
queryset=RearPort.objects.all(),
to_field_name='rear_port',
label=_('Rear port (ID)'),
@@ -2131,7 +2131,7 @@ class RearPortFilterSet(ModularDeviceComponentFilterSet, CabledObjectFilterSet):
null_value=None
)
front_port_id = django_filters.ModelMultipleChoiceFilter(
field_name='assignments__front_port',
field_name='mappings__front_port',
queryset=FrontPort.objects.all(),
to_field_name='front_port',
label=_('Front port (ID)'),
netbox/dcim/forms/mixins.py
+9 -9
View File
@@ -4,7 +4,7 @@ from django.core.exceptions import ObjectDoesNotExist, ValidationError
from django.utils.translation import gettext_lazy as _
from dcim.constants import LOCATION_SCOPE_TYPES
from dcim.models import PortAssignmentTemplate, Site
from dcim.models import PortTemplateMapping, Site
from utilities.forms import get_field_value
from utilities.forms.fields import (
ContentTypeChoiceField, CSVContentTypeField, DynamicModelChoiceField,
@@ -138,7 +138,7 @@ class FrontPortFormMixin(forms.Form):
widget=forms.SelectMultiple(attrs={'size': 8})
)
port_assignment_model = PortAssignmentTemplate
port_mapping_model = PortTemplateMapping
def clean(self):
super().clean()
@@ -161,19 +161,19 @@ class FrontPortFormMixin(forms.Form):
super()._save_m2m()
# TODO: Can this be made more efficient?
# Delete existing rear port assignments
self.port_assignment_model.objects.filter(front_port_id=self.instance.pk).delete()
# Delete existing rear port mappings
self.port_mapping_model.objects.filter(front_port_id=self.instance.pk).delete()
# Create new rear port assignments
assignments = []
# Create new rear port mappings
mappings = []
for i, rp_position in enumerate(self.cleaned_data['rear_ports'], start=1):
rear_port_id, rear_port_position = rp_position.split(':')
assignments.append(
self.port_assignment_model(
mappings.append(
self.port_mapping_model(
front_port_id=self.instance.pk,
front_port_position=i,
rear_port_id=rear_port_id,
rear_port_position=rear_port_position,
)
)
self.port_assignment_model.objects.bulk_create(assignments)
self.port_mapping_model.objects.bulk_create(mappings)
netbox/dcim/forms/model_forms.py
+10 -10
View File
@@ -1124,7 +1124,7 @@ class FrontPortTemplateForm(FrontPortFormMixin, ModularComponentTemplateForm):
),
)
port_assignment_model = PortAssignmentTemplate
port_mapping_model = PortTemplateMapping
parent_field = 'device_type'
class Meta:
@@ -1144,11 +1144,11 @@ class FrontPortTemplateForm(FrontPortFormMixin, ModularComponentTemplateForm):
# Populate rear port choices
self.fields['rear_ports'].choices = self._get_rear_port_choices(device_type, self.instance)
# Set initial rear port assignments
# Set initial rear port mappings
if self.instance.pk:
self.initial['rear_ports'] = [
f'{assignment.rear_port_id}:{assignment.rear_port_position}'
for assignment in PortAssignmentTemplate.objects.filter(front_port_id=self.instance.pk)
f'{mapping.rear_port_id}:{mapping.rear_port_position}'
for mapping in PortTemplateMapping.objects.filter(front_port_id=self.instance.pk)
]
def _get_rear_port_choices(self, device_type, front_port):
@@ -1158,7 +1158,7 @@ class FrontPortTemplateForm(FrontPortFormMixin, ModularComponentTemplateForm):
"""
occupied_rear_port_positions = [
f'{assignment.rear_port_id}:{assignment.rear_port_position}'
for assignment in PortAssignmentTemplate.objects.filter(
for assignment in PortTemplateMapping.objects.filter(
front_port__device_type=device_type
).exclude(front_port=front_port.pk)
]
@@ -1620,7 +1620,7 @@ class FrontPortForm(FrontPortFormMixin, ModularDeviceComponentForm):
),
)
port_assignment_model = PortAssignment
port_mapping_model = PortMapping
class Meta:
model = FrontPort
@@ -1640,11 +1640,11 @@ class FrontPortForm(FrontPortFormMixin, ModularDeviceComponentForm):
# Populate rear port choices
self.fields['rear_ports'].choices = self._get_rear_port_choices(device, self.instance)
# Set initial rear port assignments
# Set initial rear port mappings
if self.instance.pk:
self.initial['rear_ports'] = [
f'{assignment.rear_port_id}:{assignment.rear_port_position}'
for assignment in PortAssignment.objects.filter(front_port_id=self.instance.pk)
f'{mapping.rear_port_id}:{mapping.rear_port_position}'
for mapping in PortMapping.objects.filter(front_port_id=self.instance.pk)
]
def _get_rear_port_choices(self, device, front_port):
@@ -1654,7 +1654,7 @@ class FrontPortForm(FrontPortFormMixin, ModularDeviceComponentForm):
"""
occupied_rear_port_positions = [
f'{assignment.rear_port_id}:{assignment.rear_port_position}'
for assignment in PortAssignment.objects.filter(front_port__device=device).exclude(front_port=front_port.pk)
for assignment in PortMapping.objects.filter(front_port__device=device).exclude(front_port=front_port.pk)
]
choices = []
netbox/dcim/graphql/types.py
+10 -10
View File
@@ -386,7 +386,7 @@ class DeviceTypeType(PrimaryObjectType):
class FrontPortType(ModularComponentType, CabledObjectMixin):
color: str
assignments: List[Annotated["PortAssignmentType", strawberry.lazy('dcim.graphql.types')]]
mappings: List[Annotated["PortMappingType", strawberry.lazy('dcim.graphql.types')]]
@strawberry_django.type(
@@ -398,7 +398,7 @@ class FrontPortType(ModularComponentType, CabledObjectMixin):
class FrontPortTemplateType(ModularComponentTemplateType):
color: str
assignments: List[Annotated["PortAssignmentTemplateType", strawberry.lazy('dcim.graphql.types')]]
mappings: List[Annotated["PortMappingTemplateType", strawberry.lazy('dcim.graphql.types')]]
@strawberry_django.type(
@@ -639,23 +639,23 @@ class PlatformType(NestedGroupObjectType):
@strawberry_django.type(
models.PortAssignment,
models.PortMapping,
fields='__all__',
# filters=PortAssignmentFilter,
# filters=PortMappingFilter,
pagination=True
)
class PortAssignmentType(ModularComponentTemplateType):
class PortMappingType(ModularComponentTemplateType):
front_port: Annotated["FrontPortType", strawberry.lazy('dcim.graphql.types')]
rear_port: Annotated["RearPortType", strawberry.lazy('dcim.graphql.types')]
@strawberry_django.type(
models.PortAssignmentTemplate,
models.PortTemplateMapping,
fields='__all__',
# filters=PortAssignmentTemplateFilter,
# filters=PortMappingTemplateFilter,
pagination=True
)
class PortAssignmentTemplateType(ModularComponentTemplateType):
class PortMappingTemplateType(ModularComponentTemplateType):
front_port_template: Annotated["FrontPortTemplateType", strawberry.lazy('dcim.graphql.types')]
rear_port_template: Annotated["RearPortTemplateType", strawberry.lazy('dcim.graphql.types')]
@@ -792,7 +792,7 @@ class RackRoleType(OrganizationalObjectType):
class RearPortType(ModularComponentType, CabledObjectMixin):
color: str
assignments: List[Annotated["PortAssignmentType", strawberry.lazy('dcim.graphql.types')]]
mappings: List[Annotated["PortMappingType", strawberry.lazy('dcim.graphql.types')]]
@strawberry_django.type(
@@ -804,7 +804,7 @@ class RearPortType(ModularComponentType, CabledObjectMixin):
class RearPortTemplateType(ModularComponentTemplateType):
color: str
assignments: List[Annotated["PortAssignmentTemplateType", strawberry.lazy('dcim.graphql.types')]]
mappings: List[Annotated["PortMappingTemplateType", strawberry.lazy('dcim.graphql.types')]]
@strawberry_django.type(
netbox/dcim/migrations/0222_m2m_port_assignments.py → netbox/dcim/migrations/0222_port_mappings.py
+26 -26
View File
@@ -14,15 +14,15 @@ def chunked(iterable, size):
yield chunk
def populate_port_template_assignments(apps, schema_editor):
def populate_port_template_mappings(apps, schema_editor):
FrontPortTemplate = apps.get_model('dcim', 'FrontPortTemplate')
PortAssignmentTemplate = apps.get_model('dcim', 'PortAssignmentTemplate')
PortTemplateMapping = apps.get_model('dcim', 'PortTemplateMapping')
front_ports = FrontPortTemplate.objects.iterator(chunk_size=1000)
def generate_copies():
for front_port in front_ports:
yield PortAssignmentTemplate(
yield PortTemplateMapping(
front_port_id=front_port.pk,
front_port_position=1,
rear_port_id=front_port.rear_port_id,
@@ -31,18 +31,18 @@ def populate_port_template_assignments(apps, schema_editor):
# Bulk insert in streaming batches
for chunk in chunked(generate_copies(), 1000):
PortAssignmentTemplate.objects.bulk_create(chunk, batch_size=1000)
PortTemplateMapping.objects.bulk_create(chunk, batch_size=1000)
def populate_port_assignments(apps, schema_editor):
def populate_port_mappings(apps, schema_editor):
FrontPort = apps.get_model('dcim', 'FrontPort')
PortAssignment = apps.get_model('dcim', 'PortAssignment')
PortMapping = apps.get_model('dcim', 'PortMapping')
front_ports = FrontPort.objects.iterator(chunk_size=1000)
def generate_copies():
for front_port in front_ports:
yield PortAssignment(
yield PortMapping(
front_port_id=front_port.pk,
front_port_position=1,
rear_port_id=front_port.rear_port_id,
@@ -51,7 +51,7 @@ def populate_port_assignments(apps, schema_editor):
# Bulk insert in streaming batches
for chunk in chunked(generate_copies(), 1000):
PortAssignment.objects.bulk_create(chunk, batch_size=1000)
PortMapping.objects.bulk_create(chunk, batch_size=1000)
class Migration(migrations.Migration):
@@ -60,9 +60,9 @@ class Migration(migrations.Migration):
]
operations = [
# Create PortAssignmentTemplate model (for DeviceTypes)
# Create PortTemplateMapping model (for DeviceTypes)
migrations.CreateModel(
name='PortAssignmentTemplate',
name='PortTemplateMapping',
fields=[
('id', models.BigAutoField(auto_created=True, primary_key=True, serialize=False)),
(
@@ -90,7 +90,7 @@ class Migration(migrations.Migration):
models.ForeignKey(
on_delete=django.db.models.deletion.CASCADE,
to='dcim.frontporttemplate',
related_name='assignments'
related_name='mappings'
)
),
(
@@ -98,29 +98,29 @@ class Migration(migrations.Migration):
models.ForeignKey(
on_delete=django.db.models.deletion.CASCADE,
to='dcim.rearporttemplate',
related_name='assignments'
related_name='mappings'
)
),
],
),
migrations.AddConstraint(
model_name='portassignmenttemplate',
model_name='porttemplatemapping',
constraint=models.UniqueConstraint(
fields=('front_port', 'front_port_position'),
name='dcim_portassignmenttemplate_unique_front_port_position'
name='dcim_porttemplatemapping_unique_front_port_position'
),
),
migrations.AddConstraint(
model_name='portassignmenttemplate',
model_name='porttemplatemapping',
constraint=models.UniqueConstraint(
fields=('rear_port', 'rear_port_position'),
name='dcim_portassignmenttemplate_unique_rear_port_position'
name='dcim_porttemplatemapping_unique_rear_port_position'
),
),
# Create PortAssignment model (for Devices)
# Create PortMapping model (for Devices)
migrations.CreateModel(
name='PortAssignment',
name='PortMapping',
fields=[
('id', models.BigAutoField(auto_created=True, primary_key=True, serialize=False)),
(
@@ -148,7 +148,7 @@ class Migration(migrations.Migration):
models.ForeignKey(
on_delete=django.db.models.deletion.CASCADE,
to='dcim.frontport',
related_name='assignments'
related_name='mappings'
)
),
(
@@ -156,33 +156,33 @@ class Migration(migrations.Migration):
models.ForeignKey(
on_delete=django.db.models.deletion.CASCADE,
to='dcim.rearport',
related_name='assignments'
related_name='mappings'
)
),
],
),
migrations.AddConstraint(
model_name='portassignment',
model_name='portmapping',
constraint=models.UniqueConstraint(
fields=('front_port', 'front_port_position'),
name='dcim_portassignment_unique_front_port_position'
name='dcim_portmapping_unique_front_port_position'
),
),
migrations.AddConstraint(
model_name='portassignment',
model_name='portmapping',
constraint=models.UniqueConstraint(
fields=('rear_port', 'rear_port_position'),
name='dcim_portassignment_unique_rear_port_position'
name='dcim_portmapping_unique_rear_port_position'
),
),
# Data migration
migrations.RunPython(
code=populate_port_template_assignments,
code=populate_port_template_mappings,
reverse_code=migrations.RunPython.noop
),
migrations.RunPython(
code=populate_port_assignments,
code=populate_port_mappings,
reverse_code=migrations.RunPython.noop
),
]
netbox/dcim/migrations/0223_frontport_positions.py
+1 -1
View File
@@ -5,7 +5,7 @@ from django.db import migrations, models
class Migration(migrations.Migration):
dependencies = [
('dcim', '0222_m2m_port_assignments'),
('dcim', '0222_port_mappings'),
]
operations = [
netbox/dcim/models/base.py
+4 -4
View File
@@ -6,13 +6,13 @@ from django.utils.translation import gettext_lazy as _
from dcim.constants import PORT_POSITION_MAX, PORT_POSITION_MIN
__all__ = (
'PortAssignmentBase',
'PortMappingBase',
)
class PortAssignmentBase(models.Model):
class PortMappingBase(models.Model):
"""
Base class for PortAssignment and PortAssignment Template
Base class for PortMapping and PortTemplateMapping
"""
front_port_position = models.PositiveSmallIntegerField(
default=1,
@@ -45,7 +45,7 @@ class PortAssignmentBase(models.Model):
def clean(self):
super().clean()
# Validate rear port position assignment
# Validate rear port position
if self.rear_port_position > self.rear_port.positions:
raise ValidationError({
"rear_port_position": _(
netbox/dcim/models/cables.py
+11 -11
View File
@@ -22,7 +22,7 @@ from utilities.fields import ColorField, GenericArrayForeignKey
from utilities.querysets import RestrictedQuerySet
from utilities.serialization import deserialize_object, serialize_object
from wireless.models import WirelessLink
from .device_components import FrontPort, PathEndpoint, PortAssignment, RearPort
from .device_components import FrontPort, PathEndpoint, PortMapping, RearPort
__all__ = (
'Cable',
@@ -795,19 +795,19 @@ class CablePath(models.Model):
q_filter = Q()
for rt in remote_terminations:
q_filter |= Q(front_port=rt, front_port_position__in=positions)
port_assignments = PortAssignment.objects.filter(q_filter)
port_mappings = PortMapping.objects.filter(q_filter)
elif remote_terminations[0].positions > 1:
is_split = True
break
else:
port_assignments = PortAssignment.objects.filter(front_port__in=remote_terminations)
if not port_assignments:
port_mappings = PortMapping.objects.filter(front_port__in=remote_terminations)
if not port_mappings:
break
# Compile the list of RearPorts without duplication or altering their ordering
terminations = list(dict.fromkeys(assignment.rear_port for assignment in port_assignments))
terminations = list(dict.fromkeys(mapping.rear_port for mapping in port_mappings))
if any(t.positions > 1 for t in terminations):
position_stack.append([assignment.rear_port_position for assignment in port_assignments])
position_stack.append([mapping.rear_port_position for mapping in port_mappings])
elif isinstance(remote_terminations[0], RearPort):
# Follow RearPorts to their corresponding FrontPorts
@@ -816,19 +816,19 @@ class CablePath(models.Model):
q_filter = Q()
for rt in remote_terminations:
q_filter |= Q(rear_port=rt, rear_port_position__in=positions)
port_assignments = PortAssignment.objects.filter(q_filter)
port_mappings = PortMapping.objects.filter(q_filter)
elif remote_terminations[0].positions > 1:
is_split = True
break
else:
port_assignments = PortAssignment.objects.filter(rear_port__in=remote_terminations)
if not port_assignments:
port_mappings = PortMapping.objects.filter(rear_port__in=remote_terminations)
if not port_mappings:
break
# Compile the list of FrontPorts without duplication or altering their ordering
terminations = list(dict.fromkeys(assignment.front_port for assignment in port_assignments))
terminations = list(dict.fromkeys(mapping.front_port for mapping in port_mappings))
if any(t.positions > 1 for t in terminations):
position_stack.append([assignment.front_port_position for assignment in port_assignments])
position_stack.append([mapping.front_port_position for mapping in port_mappings])
elif isinstance(remote_terminations[0], CircuitTermination):
# Follow a CircuitTermination to its corresponding CircuitTermination (A to Z or vice versa)
netbox/dcim/models/device_component_templates.py
+8 -8
View File
@@ -7,7 +7,7 @@ from mptt.models import MPTTModel, TreeForeignKey
from dcim.choices import *
from dcim.constants import *
from dcim.models.base import PortAssignmentBase
from dcim.models.base import PortMappingBase
from dcim.models.mixins import InterfaceValidationMixin
from netbox.models import ChangeLoggedModel
from utilities.fields import ColorField, NaturalOrderingField
@@ -29,7 +29,7 @@ __all__ = (
'InterfaceTemplate',
'InventoryItemTemplate',
'ModuleBayTemplate',
'PortAssignmentTemplate',
'PortTemplateMapping',
'PowerOutletTemplate',
'PowerPortTemplate',
'RearPortTemplate',
@@ -520,19 +520,19 @@ class InterfaceTemplate(InterfaceValidationMixin, ModularComponentTemplateModel)
}
class PortAssignmentTemplate(PortAssignmentBase):
class PortTemplateMapping(PortMappingBase):
"""
Maps a FrontPortTemplate & position to a RearPortTemplate & position.
"""
front_port = models.ForeignKey(
to='dcim.FrontPortTemplate',
on_delete=models.CASCADE,
related_name='assignments',
related_name='mappings',
)
rear_port = models.ForeignKey(
to='dcim.RearPortTemplate',
on_delete=models.CASCADE,
related_name='assignments',
related_name='mappings',
)
def clean(self):
@@ -640,13 +640,13 @@ class RearPortTemplate(ModularComponentTemplateModel):
# Check that positions count is greater than or equal to the number of associated FrontPortTemplates
if not self._state.adding:
assignment_count = self.assignments.count()
if self.positions < assignment_count:
mapping_count = self.mappings.count()
if self.positions < mapping_count:
raise ValidationError({
"positions": _(
"The number of positions cannot be less than the number of mapped front port templates "
"({count})"
).format(count=assignment_count)
).format(count=mapping_count)
})
def instantiate(self, **kwargs):
netbox/dcim/models/device_components.py
+9 -9
View File
@@ -11,7 +11,7 @@ from mptt.models import MPTTModel, TreeForeignKey
from dcim.choices import *
from dcim.constants import *
from dcim.fields import WWNField
from dcim.models.base import PortAssignmentBase
from dcim.models.base import PortMappingBase
from dcim.models.mixins import InterfaceValidationMixin
from netbox.choices import ColorChoices
from netbox.models import OrganizationalModel, NetBoxModel
@@ -36,7 +36,7 @@ __all__ = (
'InventoryItemRole',
'ModuleBay',
'PathEndpoint',
'PortAssignment',
'PortMapping',
'PowerOutlet',
'PowerPort',
'RearPort',
@@ -1071,25 +1071,25 @@ class Interface(
# Pass-through ports
#
class PortAssignment(PortAssignmentBase):
class PortMapping(PortMappingBase):
"""
Maps a FrontPort & position to a RearPort & position.
"""
front_port = models.ForeignKey(
to='dcim.FrontPort',
on_delete=models.CASCADE,
related_name='assignments',
related_name='mappings',
)
rear_port = models.ForeignKey(
to='dcim.RearPort',
on_delete=models.CASCADE,
related_name='assignments',
related_name='mappings',
)
def clean(self):
super().clean()
# Validate rear port assignment
# Both ports must belong to the same device
if self.front_port.device_id != self.rear_port.device_id:
raise ValidationError({
"rear_port": _("Rear port ({rear_port}) must belong to the same device").format(
@@ -1166,13 +1166,13 @@ class RearPort(ModularComponentModel, CabledObjectModel, TrackingModelMixin):
# Check that positions count is greater than or equal to the number of associated FrontPorts
if not self._state.adding:
assignment_count = self.assignments.count()
if self.positions < assignment_count:
mapping_count = self.mappings.count()
if self.positions < mapping_count:
raise ValidationError({
"positions": _(
"The number of positions cannot be less than the number of mapped front ports "
"({count})"
).format(count=assignment_count)
).format(count=mapping_count)
})
netbox/dcim/models/devices.py
+4 -4
View File
@@ -19,7 +19,7 @@ from django.utils.translation import gettext_lazy as _
from dcim.choices import *
from dcim.constants import *
from dcim.fields import MACAddressField
from dcim.utils import create_port_assignments, update_interface_bridges
from dcim.utils import create_port_mappings, update_interface_bridges
from extras.models import ConfigContextModel, CustomField
from extras.querysets import ConfigContextModelQuerySet
from netbox.choices import ColorChoices
@@ -30,7 +30,7 @@ from netbox.models.features import ContactsMixin, ImageAttachmentsMixin
from utilities.fields import ColorField, CounterCacheField
from utilities.prefetch import get_prefetchable_fields
from utilities.tracking import TrackingModelMixin
from . import PortAssignmentTemplate
from . import PortTemplateMapping
from .device_components import *
from .mixins import RenderConfigMixin
from .modules import Module
@@ -1011,8 +1011,8 @@ class Device(
self._instantiate_components(self.device_type.inventoryitemtemplates.all(), bulk_create=False)
# Interface bridges have to be set after interface instantiation
update_interface_bridges(self, self.device_type.interfacetemplates.all())
# Replicate any front/rear port assignments from the DeviceType
create_port_assignments(self, PortAssignmentTemplate.objects.filter(
# Replicate any front/rear port mappings from the DeviceType
create_port_mappings(self, PortTemplateMapping.objects.filter(
front_port__device_type=self.device_type
))
netbox/dcim/signals.py
+2 -2
View File
@@ -156,8 +156,8 @@ def extend_rearport_cable_paths(instance, created, raw, **kwargs):
When a new FrontPort is created, add it to any CablePaths which end at its corresponding RearPort.
"""
if created and not raw:
for assignment in instance.assignments.prefetch_related('rear_port'):
for cablepath in CablePath.objects.filter(_nodes__contains=assignment.rear_port):
for mapping in instance.mappings.prefetch_related('rear_port'):
for cablepath in CablePath.objects.filter(_nodes__contains=mapping.rear_port):
cablepath.retrace()
netbox/dcim/tables/devices.py
+12 -12
View File
@@ -749,8 +749,8 @@ class FrontPortTable(ModularDeviceComponentTable, CableTerminationTable):
color = columns.ColorColumn(
verbose_name=_('Color'),
)
assignments = columns.ManyToManyColumn(
verbose_name=_('Assignments'),
mappings = columns.ManyToManyColumn(
verbose_name=_('Mappings'),
transform=lambda obj: f'{obj.rear_port}:{obj.rear_port_position}'
)
tags = columns.TagColumn(
@@ -760,12 +760,12 @@ class FrontPortTable(ModularDeviceComponentTable, CableTerminationTable):
class Meta(DeviceComponentTable.Meta):
model = models.FrontPort
fields = (
'pk', 'id', 'name', 'device', 'module_bay', 'module', 'label', 'type', 'color', 'positions', 'assignments',
'pk', 'id', 'name', 'device', 'module_bay', 'module', 'label', 'type', 'color', 'positions', 'mappings',
'description', 'mark_connected', 'cable', 'cable_color', 'link_peer', 'inventory_items', 'tags', 'created',
'last_updated',
)
default_columns = (
'pk', 'name', 'device', 'label', 'type', 'color', 'positions', 'assignments', 'description',
'pk', 'name', 'device', 'label', 'type', 'color', 'positions', 'mappings', 'description',
)
@@ -783,11 +783,11 @@ class DeviceFrontPortTable(FrontPortTable):
class Meta(CableTerminationTable.Meta, DeviceComponentTable.Meta):
model = models.FrontPort
fields = (
'pk', 'id', 'name', 'module_bay', 'module', 'label', 'type', 'color', 'positions', 'assignments',
'pk', 'id', 'name', 'module_bay', 'module', 'label', 'type', 'color', 'positions', 'mappings',
'description', 'mark_connected', 'cable', 'cable_color', 'link_peer', 'tags', 'actions',
)
default_columns = (
'pk', 'name', 'label', 'type', 'color', 'positions', 'assignments', 'description', 'cable', 'link_peer',
'pk', 'name', 'label', 'type', 'color', 'positions', 'mappings', 'description', 'cable', 'link_peer',
)
@@ -802,8 +802,8 @@ class RearPortTable(ModularDeviceComponentTable, CableTerminationTable):
color = columns.ColorColumn(
verbose_name=_('Color'),
)
assignments = columns.ManyToManyColumn(
verbose_name=_('Assignments'),
mappings = columns.ManyToManyColumn(
verbose_name=_('Mappings'),
transform=lambda obj: f'{obj.front_port}:{obj.front_port_position}'
)
tags = columns.TagColumn(
@@ -813,12 +813,12 @@ class RearPortTable(ModularDeviceComponentTable, CableTerminationTable):
class Meta(DeviceComponentTable.Meta):
model = models.RearPort
fields = (
'pk', 'id', 'name', 'device', 'module_bay', 'module', 'label', 'type', 'color', 'positions', 'assignments',
'pk', 'id', 'name', 'device', 'module_bay', 'module', 'label', 'type', 'color', 'positions', 'mappings',
'description', 'mark_connected', 'cable', 'cable_color', 'link_peer', 'inventory_items', 'tags', 'created',
'last_updated',
)
default_columns = (
'pk', 'name', 'device', 'label', 'type', 'color', 'positions', 'assignments', 'description',
'pk', 'name', 'device', 'label', 'type', 'color', 'positions', 'mappings', 'description',
)
@@ -836,11 +836,11 @@ class DeviceRearPortTable(RearPortTable):
class Meta(CableTerminationTable.Meta, DeviceComponentTable.Meta):
model = models.RearPort
fields = (
'pk', 'id', 'name', 'module_bay', 'module', 'label', 'type', 'color', 'positions', 'assignments',
'pk', 'id', 'name', 'module_bay', 'module', 'label', 'type', 'color', 'positions', 'mappings',
'description', 'mark_connected', 'cable', 'cable_color', 'link_peer', 'tags', 'actions',
)
default_columns = (
'pk', 'name', 'label', 'type', 'positions', 'assignments', 'description', 'cable', 'link_peer',
'pk', 'name', 'label', 'type', 'positions', 'mappings', 'description', 'cable', 'link_peer',
)
netbox/dcim/tables/devicetypes.py
+6 -6
View File
@@ -252,8 +252,8 @@ class FrontPortTemplateTable(ComponentTemplateTable):
color = columns.ColorColumn(
verbose_name=_('Color'),
)
assignments = columns.ManyToManyColumn(
verbose_name=_('Assignments'),
mappings = columns.ManyToManyColumn(
verbose_name=_('Mappings'),
transform=lambda obj: f'{obj.rear_port}:{obj.rear_port_position}'
)
actions = columns.ActionsColumn(
@@ -263,7 +263,7 @@ class FrontPortTemplateTable(ComponentTemplateTable):
class Meta(ComponentTemplateTable.Meta):
model = models.FrontPortTemplate
fields = ('pk', 'name', 'label', 'type', 'color', 'positions', 'assignments', 'description', 'actions')
fields = ('pk', 'name', 'label', 'type', 'color', 'positions', 'mappings', 'description', 'actions')
empty_text = "None"
@@ -271,8 +271,8 @@ class RearPortTemplateTable(ComponentTemplateTable):
color = columns.ColorColumn(
verbose_name=_('Color'),
)
assignments = columns.ManyToManyColumn(
verbose_name=_('Assignments'),
mappings = columns.ManyToManyColumn(
verbose_name=_('Mappings'),
transform=lambda obj: f'{obj.front_port}:{obj.front_port_position}'
)
actions = columns.ActionsColumn(
@@ -282,7 +282,7 @@ class RearPortTemplateTable(ComponentTemplateTable):
class Meta(ComponentTemplateTable.Meta):
model = models.RearPortTemplate
fields = ('pk', 'name', 'label', 'type', 'color', 'positions', 'assignments', 'description', 'actions')
fields = ('pk', 'name', 'label', 'type', 'color', 'positions', 'mappings', 'description', 'actions')
empty_text = "None"
netbox/dcim/tests/test_api.py
+13 -13
View File
@@ -983,10 +983,10 @@ class FrontPortTemplateTest(APIViewTestCases.APIViewTestCase):
FrontPortTemplate(module_type=moduletype, name='Front Port Template 3', type=PortTypeChoices.TYPE_8P8C),
)
FrontPortTemplate.objects.bulk_create(front_port_templates)
PortAssignmentTemplate.objects.bulk_create([
PortAssignmentTemplate(front_port=front_port_templates[0], rear_port=rear_port_templates[0]),
PortAssignmentTemplate(front_port=front_port_templates[1], rear_port=rear_port_templates[1]),
PortAssignmentTemplate(front_port=front_port_templates[2], rear_port=rear_port_templates[2]),
PortTemplateMapping.objects.bulk_create([
PortTemplateMapping(front_port=front_port_templates[0], rear_port=rear_port_templates[0]),
PortTemplateMapping(front_port=front_port_templates[1], rear_port=rear_port_templates[1]),
PortTemplateMapping(front_port=front_port_templates[2], rear_port=rear_port_templates[2]),
])
cls.create_data = [
@@ -1061,10 +1061,10 @@ class RearPortTemplateTest(APIViewTestCases.APIViewTestCase):
RearPortTemplate(device_type=devicetype, name='Rear Port Template 3', type=PortTypeChoices.TYPE_8P8C),
)
RearPortTemplate.objects.bulk_create(rear_port_templates)
PortAssignmentTemplate.objects.bulk_create([
PortAssignmentTemplate(front_port=front_port_templates[0], rear_port=rear_port_templates[0]),
PortAssignmentTemplate(front_port=front_port_templates[1], rear_port=rear_port_templates[1]),
PortAssignmentTemplate(front_port=front_port_templates[2], rear_port=rear_port_templates[2]),
PortTemplateMapping.objects.bulk_create([
PortTemplateMapping(front_port=front_port_templates[0], rear_port=rear_port_templates[0]),
PortTemplateMapping(front_port=front_port_templates[1], rear_port=rear_port_templates[1]),
PortTemplateMapping(front_port=front_port_templates[2], rear_port=rear_port_templates[2]),
])
cls.create_data = [
@@ -2040,10 +2040,10 @@ class FrontPortTest(APIViewTestCases.APIViewTestCase):
FrontPort(device=device, name='Front Port 3', type=PortTypeChoices.TYPE_8P8C),
)
FrontPort.objects.bulk_create(front_ports)
PortAssignment.objects.bulk_create([
PortAssignment(front_port=front_ports[0], rear_port=rear_ports[0]),
PortAssignment(front_port=front_ports[1], rear_port=rear_ports[1]),
PortAssignment(front_port=front_ports[2], rear_port=rear_ports[2]),
PortMapping.objects.bulk_create([
PortMapping(front_port=front_ports[0], rear_port=rear_ports[0]),
PortMapping(front_port=front_ports[1], rear_port=rear_ports[1]),
PortMapping(front_port=front_ports[2], rear_port=rear_ports[2]),
])
cls.create_data = [
@@ -2091,7 +2091,7 @@ class FrontPortTest(APIViewTestCases.APIViewTestCase):
interface1 = Interface.objects.create(device=device, name='Interface 1')
rear_port = RearPort.objects.create(device=device, name='Rear Port 10', type=PortTypeChoices.TYPE_8P8C)
front_port = FrontPort.objects.create(device=device, name='Front Port 10', type=PortTypeChoices.TYPE_8P8C)
PortAssignment.objects.create(front_port=front_port, rear_port=rear_port)
PortMapping.objects.create(front_port=front_port, rear_port=rear_port)
Cable.objects.create(a_terminations=[interface1], b_terminations=[front_port])
self.add_permissions(f'dcim.view_{self.model._meta.model_name}')
netbox/dcim/tests/test_cablepaths.py
+90 -90
View File
@@ -283,7 +283,7 @@ class LegacyCablePathTests(CablePathTestCase):
interface2 = Interface.objects.create(device=self.device, name='Interface 2')
rearport1 = RearPort.objects.create(device=self.device, name='Rear Port 1')
frontport1 = FrontPort.objects.create(device=self.device, name='Front Port 1')
PortAssignment.objects.create(
PortMapping.objects.create(
front_port=frontport1,
front_port_position=1,
rear_port=rearport1,
@@ -346,7 +346,7 @@ class LegacyCablePathTests(CablePathTestCase):
interface4 = Interface.objects.create(device=self.device, name='Interface 4')
rearport1 = RearPort.objects.create(device=self.device, name='Rear Port 1')
frontport1 = FrontPort.objects.create(device=self.device, name='Front Port 1')
PortAssignment.objects.create(
PortMapping.objects.create(
front_port=frontport1,
front_port_position=1,
rear_port=rearport1,
@@ -415,17 +415,17 @@ class LegacyCablePathTests(CablePathTestCase):
frontport1_2 = FrontPort.objects.create(device=self.device, name='Front Port 1:2')
frontport2_1 = FrontPort.objects.create(device=self.device, name='Front Port 2:1')
frontport2_2 = FrontPort.objects.create(device=self.device, name='Front Port 2:2')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2,
),
PortAssignment(
PortMapping(
front_port=frontport2_1, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2_2, front_port_position=1, rear_port=rearport2, rear_port_position=2,
),
])
@@ -539,17 +539,17 @@ class LegacyCablePathTests(CablePathTestCase):
frontport1_2 = FrontPort.objects.create(device=self.device, name='Front Port 1:2')
frontport2_1 = FrontPort.objects.create(device=self.device, name='Front Port 2:1')
frontport2_2 = FrontPort.objects.create(device=self.device, name='Front Port 2:2')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2,
),
PortAssignment(
PortMapping(
front_port=frontport2_1, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2_2, front_port_position=1, rear_port=rearport2, rear_port_position=2,
),
])
@@ -709,23 +709,23 @@ class LegacyCablePathTests(CablePathTestCase):
frontport3 = FrontPort.objects.create(device=self.device, name='Front Port 3')
frontport4_1 = FrontPort.objects.create(device=self.device, name='Front Port 4:1')
frontport4_2 = FrontPort.objects.create(device=self.device, name='Front Port 4:2')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2,
),
PortAssignment(
PortMapping(
front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport3, front_port_position=1, rear_port=rearport3, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport4_1, front_port_position=1, rear_port=rearport4, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport4_2, front_port_position=1, rear_port=rearport4, rear_port_position=2,
),
])
@@ -837,29 +837,29 @@ class LegacyCablePathTests(CablePathTestCase):
frontport3_2 = FrontPort.objects.create(device=self.device, name='Front Port 3:2')
frontport4_1 = FrontPort.objects.create(device=self.device, name='Front Port 4:1')
frontport4_2 = FrontPort.objects.create(device=self.device, name='Front Port 4:2')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2,
),
PortAssignment(
PortMapping(
front_port=frontport2_1, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2_2, front_port_position=1, rear_port=rearport2, rear_port_position=2,
),
PortAssignment(
PortMapping(
front_port=frontport3_1, front_port_position=1, rear_port=rearport3, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport3_2, front_port_position=1, rear_port=rearport3, rear_port_position=2,
),
PortAssignment(
PortMapping(
front_port=frontport4_1, front_port_position=1, rear_port=rearport4, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport4_2, front_port_position=1, rear_port=rearport4, rear_port_position=2,
),
])
@@ -973,20 +973,20 @@ class LegacyCablePathTests(CablePathTestCase):
frontport2 = FrontPort.objects.create(device=self.device, name='Front Port 2')
frontport3_1 = FrontPort.objects.create(device=self.device, name='Front Port 3:1')
frontport3_2 = FrontPort.objects.create(device=self.device, name='Front Port 3:2')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2,
),
PortAssignment(
PortMapping(
front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport3_1, front_port_position=1, rear_port=rearport3, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport3_2, front_port_position=1, rear_port=rearport3, rear_port_position=2,
),
])
@@ -1080,11 +1080,11 @@ class LegacyCablePathTests(CablePathTestCase):
rearport1 = RearPort.objects.create(device=self.device, name='Rear Port 1', positions=2)
frontport1_1 = FrontPort.objects.create(device=self.device, name='Front Port 1:1')
frontport1_2 = FrontPort.objects.create(device=self.device, name='Front Port 1:2')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2,
),
])
@@ -1150,7 +1150,7 @@ class LegacyCablePathTests(CablePathTestCase):
rearport1 = RearPort.objects.create(device=self.device, name='Rear Port 1')
rearport2 = RearPort.objects.create(device=self.device, name='Rear Port 2')
frontport1 = FrontPort.objects.create(device=self.device, name='Front Port 1')
PortAssignment.objects.create(
PortMapping.objects.create(
front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
)
@@ -1467,17 +1467,17 @@ class LegacyCablePathTests(CablePathTestCase):
frontport1_2 = FrontPort.objects.create(device=self.device, name='Front Port 1:2')
frontport2_1 = FrontPort.objects.create(device=self.device, name='Front Port 2:1')
frontport2_2 = FrontPort.objects.create(device=self.device, name='Front Port 2:2')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2,
),
PortAssignment(
PortMapping(
front_port=frontport2_1, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2_2, front_port_position=1, rear_port=rearport2, rear_port_position=2,
),
])
@@ -1665,17 +1665,17 @@ class LegacyCablePathTests(CablePathTestCase):
frontport2 = FrontPort.objects.create(device=self.device, name='Front Port 2')
frontport3 = FrontPort.objects.create(device=self.device, name='Front Port 3')
frontport4 = FrontPort.objects.create(device=self.device, name='Front Port 4')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport3, front_port_position=1, rear_port=rearport3, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport4, front_port_position=1, rear_port=rearport4, rear_port_position=1,
),
])
@@ -1758,29 +1758,29 @@ class LegacyCablePathTests(CablePathTestCase):
frontport2_2 = FrontPort.objects.create(device=self.device, name='Front Port 2:2')
frontport2_3 = FrontPort.objects.create(device=self.device, name='Front Port 2:3')
frontport2_4 = FrontPort.objects.create(device=self.device, name='Front Port 2:4')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2,
),
PortAssignment(
PortMapping(
front_port=frontport1_3, front_port_position=1, rear_port=rearport1, rear_port_position=3,
),
PortAssignment(
PortMapping(
front_port=frontport1_4, front_port_position=1, rear_port=rearport1, rear_port_position=4,
),
PortAssignment(
PortMapping(
front_port=frontport2_1, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2_2, front_port_position=1, rear_port=rearport2, rear_port_position=2,
),
PortAssignment(
PortMapping(
front_port=frontport2_3, front_port_position=1, rear_port=rearport2, rear_port_position=3,
),
PortAssignment(
PortMapping(
front_port=frontport2_4, front_port_position=1, rear_port=rearport2, rear_port_position=4,
),
])
@@ -1938,17 +1938,17 @@ class LegacyCablePathTests(CablePathTestCase):
frontport2 = FrontPort.objects.create(device=self.device, name='Front Port 2')
frontport3 = FrontPort.objects.create(device=self.device, name='Front Port 3')
frontport4 = FrontPort.objects.create(device=self.device, name='Front Port 4')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport3, front_port_position=1, rear_port=rearport3, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport4, front_port_position=1, rear_port=rearport4, rear_port_position=1,
),
])
@@ -2023,17 +2023,17 @@ class LegacyCablePathTests(CablePathTestCase):
frontport2 = FrontPort.objects.create(device=self.device, name='Front Port 2')
frontport3 = FrontPort.objects.create(device=self.device, name='Front Port 3')
frontport4 = FrontPort.objects.create(device=self.device, name='Front Port 4')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport3, front_port_position=1, rear_port=rearport3, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport4, front_port_position=1, rear_port=rearport4, rear_port_position=1,
),
])
@@ -2129,23 +2129,23 @@ class LegacyCablePathTests(CablePathTestCase):
frontport4 = FrontPort.objects.create(device=self.device, name='Front Port 4')
frontport5 = FrontPort.objects.create(device=self.device, name='Front Port 5')
frontport6 = FrontPort.objects.create(device=self.device, name='Front Port 6')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport3, front_port_position=1, rear_port=rearport3, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport4, front_port_position=1, rear_port=rearport4, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport5, front_port_position=1, rear_port=rearport5, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport6, front_port_position=1, rear_port=rearport6, rear_port_position=1,
),
])
@@ -2251,11 +2251,11 @@ class LegacyCablePathTests(CablePathTestCase):
rearport2 = RearPort.objects.create(device=self.device, name='Rear Port 2')
frontport1 = FrontPort.objects.create(device=self.device, name='Front Port 1')
frontport2 = FrontPort.objects.create(device=self.device, name='Front Port 2')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
])
@@ -2374,11 +2374,11 @@ class LegacyCablePathTests(CablePathTestCase):
rearport2 = RearPort.objects.create(device=self.device, name='Rear Port 2')
frontport1 = FrontPort.objects.create(device=self.device, name='Front Port 1')
frontport2 = FrontPort.objects.create(device=self.device, name='Front Port 2')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
])
@@ -2424,11 +2424,11 @@ class LegacyCablePathTests(CablePathTestCase):
rearport2 = RearPort.objects.create(device=self.device, name='Rear Port 2')
frontport1 = FrontPort.objects.create(device=self.device, name='Front Port 1')
frontport2 = FrontPort.objects.create(device=self.device, name='Front Port 2')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
])
@@ -2479,8 +2479,8 @@ class LegacyCablePathTests(CablePathTestCase):
interface2 = Interface.objects.create(device=self.device, name='Interface 2')
rearport1 = RearPort.objects.create(device=self.device, name='Rear Port 1')
frontport1 = FrontPort.objects.create(device=self.device, name='Front Port 1')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
])
@@ -2593,17 +2593,17 @@ class LegacyCablePathTests(CablePathTestCase):
frontport2 = FrontPort.objects.create(device=self.device, name='Front Port 2')
frontport3 = FrontPort.objects.create(device=self.device, name='Front Port 3')
frontport4 = FrontPort.objects.create(device=self.device, name='Front Port 4')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport3, front_port_position=1, rear_port=rearport3, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport4, front_port_position=1, rear_port=rearport4, rear_port_position=1,
),
])
netbox/dcim/tests/test_cablepaths2.py
+15 -15
View File
@@ -363,8 +363,8 @@ class CablePathTests(CablePathTestCase):
]
rearport1 = RearPort.objects.create(device=self.device, name='Rear Port 1')
frontport1 = FrontPort.objects.create(device=self.device, name='Front Port 1')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
])
@@ -441,17 +441,17 @@ class CablePathTests(CablePathTestCase):
frontport1_2 = FrontPort.objects.create(device=self.device, name='Front Port 1:2')
frontport2_1 = FrontPort.objects.create(device=self.device, name='Front Port 2:1')
frontport2_2 = FrontPort.objects.create(device=self.device, name='Front Port 2:2')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2,
),
PortAssignment(
PortMapping(
front_port=frontport2_1, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2_2, front_port_position=1, rear_port=rearport2, rear_port_position=2,
),
])
@@ -669,17 +669,17 @@ class CablePathTests(CablePathTestCase):
FrontPort.objects.create(device=self.device, name='Front Port 3'),
FrontPort.objects.create(device=self.device, name='Front Port 4'),
]
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=front_ports[0], front_port_position=1, rear_port=rear_ports[0], rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=front_ports[1], front_port_position=1, rear_port=rear_ports[1], rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=front_ports[2], front_port_position=1, rear_port=rear_ports[2], rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=front_ports[3], front_port_position=1, rear_port=rear_ports[3], rear_port_position=1,
),
])
@@ -748,11 +748,11 @@ class CablePathTests(CablePathTestCase):
rearport2 = RearPort.objects.create(device=self.device, name='Rear Port 2')
frontport1 = FrontPort.objects.create(device=self.device, name='Front Port 1')
frontport2 = FrontPort.objects.create(device=self.device, name='Front Port 2')
PortAssignment.objects.bulk_create([
PortAssignment(
PortMapping.objects.bulk_create([
PortMapping(
front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1,
),
PortAssignment(
PortMapping(
front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1,
),
])
netbox/dcim/tests/test_filtersets.py
+21 -21
View File
@@ -1360,9 +1360,9 @@ class DeviceTypeTestCase(TestCase, ChangeLoggedFilterSetTests):
FrontPortTemplate(device_type=device_types[1], name='Front Port 2', type=PortTypeChoices.TYPE_8P8C),
)
FrontPortTemplate.objects.bulk_create(front_ports)
PortAssignmentTemplate.objects.bulk_create([
PortAssignmentTemplate(front_port=front_ports[0], rear_port=rear_ports[0]),
PortAssignmentTemplate(front_port=front_ports[1], rear_port=rear_ports[1]),
PortTemplateMapping.objects.bulk_create([
PortTemplateMapping(front_port=front_ports[0], rear_port=rear_ports[0]),
PortTemplateMapping(front_port=front_ports[1], rear_port=rear_ports[1]),
])
ModuleBayTemplate.objects.bulk_create((
ModuleBayTemplate(device_type=device_types[0], name='Module Bay 1'),
@@ -1624,9 +1624,9 @@ class ModuleTypeTestCase(TestCase, ChangeLoggedFilterSetTests):
FrontPortTemplate(module_type=module_types[1], name='Front Port 2', type=PortTypeChoices.TYPE_8P8C),
)
FrontPortTemplate.objects.bulk_create(front_ports)
PortAssignmentTemplate.objects.bulk_create([
PortAssignmentTemplate(front_port=front_ports[0], rear_port=rear_ports[0]),
PortAssignmentTemplate(front_port=front_ports[1], rear_port=rear_ports[1]),
PortTemplateMapping.objects.bulk_create([
PortTemplateMapping(front_port=front_ports[0], rear_port=rear_ports[0]),
PortTemplateMapping(front_port=front_ports[1], rear_port=rear_ports[1]),
])
def test_q(self):
@@ -2067,10 +2067,10 @@ class FrontPortTemplateTestCase(TestCase, DeviceComponentTemplateFilterSetTests,
),
)
FrontPortTemplate.objects.bulk_create(front_ports)
PortAssignmentTemplate.objects.bulk_create([
PortAssignmentTemplate(front_port=front_ports[0], rear_port=rear_ports[0]),
PortAssignmentTemplate(front_port=front_ports[1], rear_port=rear_ports[1]),
PortAssignmentTemplate(front_port=front_ports[2], rear_port=rear_ports[2]),
PortTemplateMapping.objects.bulk_create([
PortTemplateMapping(front_port=front_ports[0], rear_port=rear_ports[0]),
PortTemplateMapping(front_port=front_ports[1], rear_port=rear_ports[1]),
PortTemplateMapping(front_port=front_ports[2], rear_port=rear_ports[2]),
])
def test_name(self):
@@ -2746,9 +2746,9 @@ class DeviceTestCase(TestCase, ChangeLoggedFilterSetTests):
FrontPort(device=devices[1], name='Front Port 2', type=PortTypeChoices.TYPE_8P8C),
)
FrontPort.objects.bulk_create(front_ports)
PortAssignment.objects.bulk_create([
PortAssignment(front_port=front_ports[0], rear_port=rear_ports[0]),
PortAssignment(front_port=front_ports[1], rear_port=rear_ports[1]),
PortMapping.objects.bulk_create([
PortMapping(front_port=front_ports[0], rear_port=rear_ports[0]),
PortMapping(front_port=front_ports[1], rear_port=rear_ports[1]),
])
ModuleBay.objects.create(device=devices[0], name='Module Bay 1')
ModuleBay.objects.create(device=devices[1], name='Module Bay 2')
@@ -5142,13 +5142,13 @@ class FrontPortTestCase(TestCase, DeviceComponentFilterSetTests, ChangeLoggedFil
),
)
FrontPort.objects.bulk_create(front_ports)
PortAssignment.objects.bulk_create([
PortAssignment(front_port=front_ports[0], rear_port=rear_ports[0]),
PortAssignment(front_port=front_ports[1], rear_port=rear_ports[1], rear_port_position=2),
PortAssignment(front_port=front_ports[2], rear_port=rear_ports[2], rear_port_position=3),
PortAssignment(front_port=front_ports[3], rear_port=rear_ports[3]),
PortAssignment(front_port=front_ports[4], rear_port=rear_ports[4]),
PortAssignment(front_port=front_ports[5], rear_port=rear_ports[5]),
PortMapping.objects.bulk_create([
PortMapping(front_port=front_ports[0], rear_port=rear_ports[0]),
PortMapping(front_port=front_ports[1], rear_port=rear_ports[1], rear_port_position=2),
PortMapping(front_port=front_ports[2], rear_port=rear_ports[2], rear_port_position=3),
PortMapping(front_port=front_ports[3], rear_port=rear_ports[3]),
PortMapping(front_port=front_ports[4], rear_port=rear_ports[4]),
PortMapping(front_port=front_ports[5], rear_port=rear_ports[5]),
])
# Cables
@@ -6412,7 +6412,7 @@ class CableTestCase(TestCase, ChangeLoggedFilterSetTests):
power_outlet = PowerOutlet.objects.create(device=devices[0], name='Power Outlet 1')
rear_port = RearPort.objects.create(device=devices[0], name='Rear Port 1')
front_port = FrontPort.objects.create(device=devices[0], name='Front Port 1')
PortAssignment.objects.create(front_port=front_port, rear_port=rear_port)
PortMapping.objects.create(front_port=front_port, rear_port=rear_port)
power_panel = PowerPanel.objects.create(name='Power Panel 1', site=sites[0])
power_feed = PowerFeed.objects.create(name='Power Feed 1', power_panel=power_panel)
netbox/dcim/tests/test_models.py
+6 -6
View File
@@ -451,7 +451,7 @@ class DeviceTestCase(TestCase):
)
frontport.save()
PortAssignmentTemplate.objects.create(
PortTemplateMapping.objects.create(
front_port=frontport,
rear_port=rearport,
rear_port_position=2,
@@ -845,11 +845,11 @@ class CableTestCase(TestCase):
FrontPort(device=patch_panel, name='FP4', type='8p8c'),
)
FrontPort.objects.bulk_create(front_ports)
PortAssignment.objects.bulk_create([
PortAssignment(front_port=front_ports[0], rear_port=rear_ports[0]),
PortAssignment(front_port=front_ports[1], rear_port=rear_ports[1]),
PortAssignment(front_port=front_ports[2], rear_port=rear_ports[2]),
PortAssignment(front_port=front_ports[3], rear_port=rear_ports[3]),
PortMapping.objects.bulk_create([
PortMapping(front_port=front_ports[0], rear_port=rear_ports[0]),
PortMapping(front_port=front_ports[1], rear_port=rear_ports[1]),
PortMapping(front_port=front_ports[2], rear_port=rear_ports[2]),
PortMapping(front_port=front_ports[3], rear_port=rear_ports[3]),
])
provider = Provider.objects.create(name='Provider 1', slug='provider-1')
netbox/dcim/tests/test_views.py
+20 -20
View File
@@ -746,10 +746,10 @@ class DeviceTypeTestCase(
FrontPortTemplate(device_type=devicetype, name='Front Port 3'),
)
FrontPortTemplate.objects.bulk_create(front_ports)
PortAssignmentTemplate.objects.bulk_create([
PortAssignmentTemplate(front_port=front_ports[0], rear_port=rear_ports[0]),
PortAssignmentTemplate(front_port=front_ports[1], rear_port=rear_ports[1]),
PortAssignmentTemplate(front_port=front_ports[2], rear_port=rear_ports[2]),
PortTemplateMapping.objects.bulk_create([
PortTemplateMapping(front_port=front_ports[0], rear_port=rear_ports[0]),
PortTemplateMapping(front_port=front_ports[1], rear_port=rear_ports[1]),
PortTemplateMapping(front_port=front_ports[2], rear_port=rear_ports[2]),
])
url = reverse('dcim:devicetype_frontports', kwargs={'pk': devicetype.pk})
@@ -1318,10 +1318,10 @@ class ModuleTypeTestCase(ViewTestCases.PrimaryObjectViewTestCase):
FrontPortTemplate(module_type=moduletype, name='Front Port 3'),
)
FrontPortTemplate.objects.bulk_create(front_ports)
PortAssignmentTemplate.objects.bulk_create([
PortAssignmentTemplate(front_port=front_ports[0], rear_port=rear_ports[0]),
PortAssignmentTemplate(front_port=front_ports[1], rear_port=rear_ports[1]),
PortAssignmentTemplate(front_port=front_ports[2], rear_port=rear_ports[2]),
PortTemplateMapping.objects.bulk_create([
PortTemplateMapping(front_port=front_ports[0], rear_port=rear_ports[0]),
PortTemplateMapping(front_port=front_ports[1], rear_port=rear_ports[1]),
PortTemplateMapping(front_port=front_ports[2], rear_port=rear_ports[2]),
])
url = reverse('dcim:moduletype_frontports', kwargs={'pk': moduletype.pk})
@@ -1776,10 +1776,10 @@ class FrontPortTemplateTestCase(ViewTestCases.DeviceComponentTemplateViewTestCas
FrontPortTemplate(device_type=devicetype, name='Front Port Template 3'),
)
FrontPortTemplate.objects.bulk_create(front_ports)
PortAssignmentTemplate.objects.bulk_create([
PortAssignmentTemplate(front_port=front_ports[0], rear_port=rear_ports[0]),
PortAssignmentTemplate(front_port=front_ports[1], rear_port=rear_ports[1]),
PortAssignmentTemplate(front_port=front_ports[2], rear_port=rear_ports[2]),
PortTemplateMapping.objects.bulk_create([
PortTemplateMapping(front_port=front_ports[0], rear_port=rear_ports[0]),
PortTemplateMapping(front_port=front_ports[1], rear_port=rear_ports[1]),
PortTemplateMapping(front_port=front_ports[2], rear_port=rear_ports[2]),
])
cls.form_data = {
@@ -2270,10 +2270,10 @@ class DeviceTestCase(ViewTestCases.PrimaryObjectViewTestCase):
FrontPort(device=device, name='Front Port Template 3'),
)
FrontPort.objects.bulk_create(front_ports)
PortAssignment.objects.bulk_create([
PortAssignment(front_port=front_ports[0], rear_port=rear_ports[0]),
PortAssignment(front_port=front_ports[1], rear_port=rear_ports[1]),
PortAssignment(front_port=front_ports[2], rear_port=rear_ports[2]),
PortMapping.objects.bulk_create([
PortMapping(front_port=front_ports[0], rear_port=rear_ports[0]),
PortMapping(front_port=front_ports[1], rear_port=rear_ports[1]),
PortMapping(front_port=front_ports[2], rear_port=rear_ports[2]),
])
url = reverse('dcim:device_frontports', kwargs={'pk': device.pk})
@@ -3075,10 +3075,10 @@ class FrontPortTestCase(ViewTestCases.DeviceComponentViewTestCase):
FrontPort(device=device, name='Front Port 3'),
)
FrontPort.objects.bulk_create(front_ports)
PortAssignment.objects.bulk_create([
PortAssignment(front_port=front_ports[0], rear_port=rear_ports[0]),
PortAssignment(front_port=front_ports[1], rear_port=rear_ports[1]),
PortAssignment(front_port=front_ports[2], rear_port=rear_ports[2]),
PortMapping.objects.bulk_create([
PortMapping(front_port=front_ports[0], rear_port=rear_ports[0]),
PortMapping(front_port=front_ports[1], rear_port=rear_ports[1]),
PortMapping(front_port=front_ports[2], rear_port=rear_ports[2]),
])
tags = create_tags('Alpha', 'Bravo', 'Charlie')
netbox/dcim/utils.py
+4 -5
View File
@@ -85,18 +85,17 @@ def update_interface_bridges(device, interface_templates, module=None):
interface.save()
def create_port_assignments(device, templates, module=None):
def create_port_mappings(device, templates, module=None):
"""
Used for device and module instantiation. Replicate all front/rear port assignments from a DeviceType to the given
device.
Replicate all front/rear port mappings from a DeviceType to the given device.
"""
from dcim.models.device_components import FrontPort, PortAssignment, RearPort
from dcim.models.device_components import FrontPort, PortMapping, RearPort
for template in templates:
front_port = FrontPort.objects.get(device=device, name=template.front_port.resolve_name(module=module))
rear_port = RearPort.objects.get(device=device, name=template.rear_port.resolve_name(module=module))
assignment = PortAssignment(
assignment = PortMapping(
front_port=front_port,
front_port_position=template.front_port_position,
rear_port=rear_port,
netbox/dcim/views.py
+3 -3
View File
@@ -42,7 +42,7 @@ from wireless.models import WirelessLAN
from . import filtersets, forms, tables
from .choices import DeviceFaceChoices, InterfaceModeChoices
from .models import *
from .models.device_components import PortAssignment
from .models.device_components import PortMapping
from .object_actions import BulkAddComponents, BulkDisconnect
CABLE_TERMINATION_TYPES = {
@@ -3245,7 +3245,7 @@ class FrontPortView(generic.ObjectView):
def get_extra_context(self, request, instance):
return {
'rear_port_assignments': PortAssignment.objects.filter(front_port=instance).prefetch_related('rear_port'),
'rear_port_mappings': PortMapping.objects.filter(front_port=instance).prefetch_related('rear_port'),
}
@@ -3321,7 +3321,7 @@ class RearPortView(generic.ObjectView):
def get_extra_context(self, request, instance):
return {
'front_port_assignments': PortAssignment.objects.filter(rear_port=instance).prefetch_related('front_port'),
'front_port_mappings': PortMapping.objects.filter(rear_port=instance).prefetch_related('front_port'),
}
netbox/templates/dcim/frontport.html
+4 -4
View File
@@ -64,11 +64,11 @@
<div class="card">
<h2 class="card-header">{% trans "Rear Ports" %}</h2>
<table class="table table-hover">
{% for assignment in rear_port_assignments %}
{% for mapping in rear_port_mappings %}
<tr>
<td>{{ assignment.front_port_position }}</td>
<td>{{ assignment.rear_port|linkify }}</td>
<td>{{ assignment.rear_port_position }}</td>
<td>{{ mapping.front_port_position }}</td>
<td>{{ mapping.rear_port|linkify }}</td>
<td>{{ mapping.rear_port_position }}</td>
</tr>
{% endfor %}
</table>
netbox/templates/dcim/rearport.html
+4 -4
View File
@@ -64,11 +64,11 @@
<div class="card">
<h2 class="card-header">{% trans "Rear Ports" %}</h2>
<table class="table table-hover">
{% for assignment in front_port_assignments %}
{% for mapping in front_port_mappings %}
<tr>
<td>{{ assignment.rear_port_position }}</td>
<td>{{ assignment.front_port|linkify }}</td>
<td>{{ assignment.front_port_position }}</td>
<td>{{ mapping.rear_port_position }}</td>
<td>{{ mapping.front_port|linkify }}</td>
<td>{{ mapping.front_port_position }}</td>
</tr>
{% endfor %}
</table>