From 4f54b29f4827999c1d7cdaca9b57095f2889dc74 Mon Sep 17 00:00:00 2001 From: Jeremy Stretch Date: Thu, 20 Nov 2025 08:34:59 -0500 Subject: [PATCH] Default FrontPort.positions to 1, to match RearPort --- .../migrations/0222_frontport_positions.py | 3 +- netbox/dcim/models/cables.py | 25 ++- netbox/dcim/models/device_components.py | 3 +- netbox/dcim/tests/test_cablepaths.py | 146 +++++++++--------- netbox/dcim/tests/test_cablepaths2.py | 22 +-- 5 files changed, 107 insertions(+), 92 deletions(-) diff --git a/netbox/dcim/migrations/0222_frontport_positions.py b/netbox/dcim/migrations/0222_frontport_positions.py index c98f9ab96..93421ee47 100644 --- a/netbox/dcim/migrations/0222_frontport_positions.py +++ b/netbox/dcim/migrations/0222_frontport_positions.py @@ -25,8 +25,7 @@ class Migration(migrations.Migration): model_name='frontport', name='positions', field=models.PositiveSmallIntegerField( - blank=True, - null=True, + default=1, validators=[ django.core.validators.MinValueValidator(1), django.core.validators.MaxValueValidator(1024) diff --git a/netbox/dcim/models/cables.py b/netbox/dcim/models/cables.py index 92fda318f..216358ac0 100644 --- a/netbox/dcim/models/cables.py +++ b/netbox/dcim/models/cables.py @@ -667,7 +667,14 @@ class CablePath(models.Model): is_active = True is_split = False + DEBUG = False + + segment = 0 while terminations: + segment += 1 + if DEBUG: + print(f'[#{segment}] Position stack: {position_stack}') + print(f'[#{segment}] Local terminations: {terminations}') # Terminations must all be of the same type if not all(isinstance(t, type(terminations[0])) for t in terminations[1:]): @@ -698,6 +705,8 @@ class CablePath(models.Model): links = list(dict.fromkeys( termination.link for termination in terminations if termination.link is not None )) + if DEBUG: + print(f'[#{segment}] Links: {links}') if len(links) == 0: if len(path) == 1: # If this is the start of the path and no link exists, return None @@ -760,6 +769,8 @@ class CablePath(models.Model): link.interface_b if link.interface_a is terminations[0] else link.interface_a for link in links ] + if DEBUG: + print(f'[#{segment}] Remote terminations: {remote_terminations}') # Remote Terminations must all be of the same type, otherwise return a split path if not all(isinstance(t, type(remote_terminations[0])) for t in remote_terminations[1:]): is_complete = False @@ -777,11 +788,15 @@ class CablePath(models.Model): if isinstance(remote_terminations[0], FrontPort): # Follow FrontPorts to their corresponding RearPorts - if any(rt.positions for rt in remote_terminations): + if remote_terminations[0].positions > 1 and position_stack: + positions = position_stack.pop() q_filter = Q() for rt in remote_terminations: - q_filter |= Q(front_port=rt, front_port_position__in=rt.positions) + q_filter |= Q(front_port=rt, front_port_position__in=positions) port_assignments = PortAssignment.objects.filter(q_filter) + elif remote_terminations[0].positions > 1: + is_split = True + break else: port_assignments = PortAssignment.objects.filter(front_port__in=remote_terminations) if not port_assignments: @@ -789,7 +804,6 @@ class CablePath(models.Model): # Compile the list of RearPorts without duplication or altering their ordering terminations = list(dict.fromkeys(assignment.rear_port for assignment in port_assignments)) - # if not(len(terminations) == 1 and terminations[0].positions == 1): if any(t.positions > 1 for t in terminations): position_stack.append([assignment.rear_port_position for assignment in port_assignments]) @@ -809,7 +823,10 @@ class CablePath(models.Model): if not port_assignments: break - terminations = [assignment.front_port for assignment in port_assignments] + # Compile the list of FrontPorts without duplication or altering their ordering + terminations = list(dict.fromkeys(assignment.front_port for assignment in port_assignments)) + if any(t.positions > 1 for t in terminations): + position_stack.append([assignment.front_port_position for assignment in port_assignments]) elif isinstance(remote_terminations[0], CircuitTermination): # Follow a CircuitTermination to its corresponding CircuitTermination (A to Z or vice versa) diff --git a/netbox/dcim/models/device_components.py b/netbox/dcim/models/device_components.py index 3b5753c77..49f0df81c 100644 --- a/netbox/dcim/models/device_components.py +++ b/netbox/dcim/models/device_components.py @@ -1148,8 +1148,7 @@ class FrontPort(ModularComponentModel, CabledObjectModel, TrackingModelMixin): ) positions = models.PositiveSmallIntegerField( verbose_name=_('positions'), - blank=True, - null=True, + default=1, validators=[ MinValueValidator(PORT_POSITION_MIN), MaxValueValidator(PORT_POSITION_MAX) diff --git a/netbox/dcim/tests/test_cablepaths.py b/netbox/dcim/tests/test_cablepaths.py index fe7a6aea7..f3c3d73c5 100644 --- a/netbox/dcim/tests/test_cablepaths.py +++ b/netbox/dcim/tests/test_cablepaths.py @@ -285,7 +285,7 @@ class LegacyCablePathTests(CablePathTestCase): frontport1 = FrontPort.objects.create(device=self.device, name='Front Port 1') PortAssignment.objects.create( front_port=frontport1, - front_port_position=None, + front_port_position=1, rear_port=rearport1, rear_port_position=1 ) @@ -348,7 +348,7 @@ class LegacyCablePathTests(CablePathTestCase): frontport1 = FrontPort.objects.create(device=self.device, name='Front Port 1') PortAssignment.objects.create( front_port=frontport1, - front_port_position=None, + front_port_position=1, rear_port=rearport1, rear_port_position=1 ) @@ -417,16 +417,16 @@ class LegacyCablePathTests(CablePathTestCase): frontport2_2 = FrontPort.objects.create(device=self.device, name='Front Port 2:2') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1_1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport1_2, front_port_position=None, rear_port=rearport1, rear_port_position=2, + front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2, ), PortAssignment( - front_port=frontport2_1, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2_1, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), PortAssignment( - front_port=frontport2_2, front_port_position=None, rear_port=rearport2, rear_port_position=2, + front_port=frontport2_2, front_port_position=1, rear_port=rearport2, rear_port_position=2, ), ]) @@ -541,16 +541,16 @@ class LegacyCablePathTests(CablePathTestCase): frontport2_2 = FrontPort.objects.create(device=self.device, name='Front Port 2:2') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1_1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport1_2, front_port_position=None, rear_port=rearport1, rear_port_position=2, + front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2, ), PortAssignment( - front_port=frontport2_1, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2_1, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), PortAssignment( - front_port=frontport2_2, front_port_position=None, rear_port=rearport2, rear_port_position=2, + front_port=frontport2_2, front_port_position=1, rear_port=rearport2, rear_port_position=2, ), ]) @@ -711,22 +711,22 @@ class LegacyCablePathTests(CablePathTestCase): frontport4_2 = FrontPort.objects.create(device=self.device, name='Front Port 4:2') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1_1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport1_2, front_port_position=None, rear_port=rearport1, rear_port_position=2, + front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2, ), PortAssignment( - front_port=frontport2, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), PortAssignment( - front_port=frontport3, front_port_position=None, rear_port=rearport3, rear_port_position=1, + front_port=frontport3, front_port_position=1, rear_port=rearport3, rear_port_position=1, ), PortAssignment( - front_port=frontport4_1, front_port_position=None, rear_port=rearport4, rear_port_position=1, + front_port=frontport4_1, front_port_position=1, rear_port=rearport4, rear_port_position=1, ), PortAssignment( - front_port=frontport4_2, front_port_position=None, rear_port=rearport4, rear_port_position=2, + front_port=frontport4_2, front_port_position=1, rear_port=rearport4, rear_port_position=2, ), ]) @@ -839,28 +839,28 @@ class LegacyCablePathTests(CablePathTestCase): frontport4_2 = FrontPort.objects.create(device=self.device, name='Front Port 4:2') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1_1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport1_2, front_port_position=None, rear_port=rearport1, rear_port_position=2, + front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2, ), PortAssignment( - front_port=frontport2_1, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2_1, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), PortAssignment( - front_port=frontport2_2, front_port_position=None, rear_port=rearport2, rear_port_position=2, + front_port=frontport2_2, front_port_position=1, rear_port=rearport2, rear_port_position=2, ), PortAssignment( - front_port=frontport3_1, front_port_position=None, rear_port=rearport3, rear_port_position=1, + front_port=frontport3_1, front_port_position=1, rear_port=rearport3, rear_port_position=1, ), PortAssignment( - front_port=frontport3_2, front_port_position=None, rear_port=rearport3, rear_port_position=2, + front_port=frontport3_2, front_port_position=1, rear_port=rearport3, rear_port_position=2, ), PortAssignment( - front_port=frontport4_1, front_port_position=None, rear_port=rearport4, rear_port_position=1, + front_port=frontport4_1, front_port_position=1, rear_port=rearport4, rear_port_position=1, ), PortAssignment( - front_port=frontport4_2, front_port_position=None, rear_port=rearport4, rear_port_position=2, + front_port=frontport4_2, front_port_position=1, rear_port=rearport4, rear_port_position=2, ), ]) @@ -975,19 +975,19 @@ class LegacyCablePathTests(CablePathTestCase): frontport3_2 = FrontPort.objects.create(device=self.device, name='Front Port 3:2') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1_1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport1_2, front_port_position=None, rear_port=rearport1, rear_port_position=2, + front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2, ), PortAssignment( - front_port=frontport2, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), PortAssignment( - front_port=frontport3_1, front_port_position=None, rear_port=rearport3, rear_port_position=1, + front_port=frontport3_1, front_port_position=1, rear_port=rearport3, rear_port_position=1, ), PortAssignment( - front_port=frontport3_2, front_port_position=None, rear_port=rearport3, rear_port_position=2, + front_port=frontport3_2, front_port_position=1, rear_port=rearport3, rear_port_position=2, ), ]) @@ -1082,10 +1082,10 @@ class LegacyCablePathTests(CablePathTestCase): frontport1_2 = FrontPort.objects.create(device=self.device, name='Front Port 1:2') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1_1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport1_2, front_port_position=None, rear_port=rearport1, rear_port_position=2, + front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2, ), ]) @@ -1151,7 +1151,7 @@ class LegacyCablePathTests(CablePathTestCase): rearport2 = RearPort.objects.create(device=self.device, name='Rear Port 2') frontport1 = FrontPort.objects.create(device=self.device, name='Front Port 1') PortAssignment.objects.create( - front_port=frontport1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ) # Create cables @@ -1469,16 +1469,16 @@ class LegacyCablePathTests(CablePathTestCase): frontport2_2 = FrontPort.objects.create(device=self.device, name='Front Port 2:2') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1_1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport1_2, front_port_position=None, rear_port=rearport1, rear_port_position=2, + front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2, ), PortAssignment( - front_port=frontport2_1, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2_1, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), PortAssignment( - front_port=frontport2_2, front_port_position=None, rear_port=rearport2, rear_port_position=2, + front_port=frontport2_2, front_port_position=1, rear_port=rearport2, rear_port_position=2, ), ]) circuittermination1 = CircuitTermination.objects.create( @@ -1667,16 +1667,16 @@ class LegacyCablePathTests(CablePathTestCase): frontport4 = FrontPort.objects.create(device=self.device, name='Front Port 4') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport2, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), PortAssignment( - front_port=frontport3, front_port_position=None, rear_port=rearport3, rear_port_position=1, + front_port=frontport3, front_port_position=1, rear_port=rearport3, rear_port_position=1, ), PortAssignment( - front_port=frontport4, front_port_position=None, rear_port=rearport4, rear_port_position=1, + front_port=frontport4, front_port_position=1, rear_port=rearport4, rear_port_position=1, ), ]) @@ -1760,28 +1760,28 @@ class LegacyCablePathTests(CablePathTestCase): frontport2_4 = FrontPort.objects.create(device=self.device, name='Front Port 2:4') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1_1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport1_2, front_port_position=None, rear_port=rearport1, rear_port_position=2, + front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2, ), PortAssignment( - front_port=frontport1_3, front_port_position=None, rear_port=rearport1, rear_port_position=3, + front_port=frontport1_3, front_port_position=1, rear_port=rearport1, rear_port_position=3, ), PortAssignment( - front_port=frontport1_4, front_port_position=None, rear_port=rearport1, rear_port_position=4, + front_port=frontport1_4, front_port_position=1, rear_port=rearport1, rear_port_position=4, ), PortAssignment( - front_port=frontport2_1, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2_1, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), PortAssignment( - front_port=frontport2_2, front_port_position=None, rear_port=rearport2, rear_port_position=2, + front_port=frontport2_2, front_port_position=1, rear_port=rearport2, rear_port_position=2, ), PortAssignment( - front_port=frontport2_3, front_port_position=None, rear_port=rearport2, rear_port_position=3, + front_port=frontport2_3, front_port_position=1, rear_port=rearport2, rear_port_position=3, ), PortAssignment( - front_port=frontport2_4, front_port_position=None, rear_port=rearport2, rear_port_position=4, + front_port=frontport2_4, front_port_position=1, rear_port=rearport2, rear_port_position=4, ), ]) @@ -1940,16 +1940,16 @@ class LegacyCablePathTests(CablePathTestCase): frontport4 = FrontPort.objects.create(device=self.device, name='Front Port 4') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport2, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), PortAssignment( - front_port=frontport3, front_port_position=None, rear_port=rearport3, rear_port_position=1, + front_port=frontport3, front_port_position=1, rear_port=rearport3, rear_port_position=1, ), PortAssignment( - front_port=frontport4, front_port_position=None, rear_port=rearport4, rear_port_position=1, + front_port=frontport4, front_port_position=1, rear_port=rearport4, rear_port_position=1, ), ]) @@ -2025,16 +2025,16 @@ class LegacyCablePathTests(CablePathTestCase): frontport4 = FrontPort.objects.create(device=self.device, name='Front Port 4') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport2, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), PortAssignment( - front_port=frontport3, front_port_position=None, rear_port=rearport3, rear_port_position=1, + front_port=frontport3, front_port_position=1, rear_port=rearport3, rear_port_position=1, ), PortAssignment( - front_port=frontport4, front_port_position=None, rear_port=rearport4, rear_port_position=1, + front_port=frontport4, front_port_position=1, rear_port=rearport4, rear_port_position=1, ), ]) @@ -2131,22 +2131,22 @@ class LegacyCablePathTests(CablePathTestCase): frontport6 = FrontPort.objects.create(device=self.device, name='Front Port 6') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport2, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), PortAssignment( - front_port=frontport3, front_port_position=None, rear_port=rearport3, rear_port_position=1, + front_port=frontport3, front_port_position=1, rear_port=rearport3, rear_port_position=1, ), PortAssignment( - front_port=frontport4, front_port_position=None, rear_port=rearport4, rear_port_position=1, + front_port=frontport4, front_port_position=1, rear_port=rearport4, rear_port_position=1, ), PortAssignment( - front_port=frontport5, front_port_position=None, rear_port=rearport5, rear_port_position=1, + front_port=frontport5, front_port_position=1, rear_port=rearport5, rear_port_position=1, ), PortAssignment( - front_port=frontport6, front_port_position=None, rear_port=rearport6, rear_port_position=1, + front_port=frontport6, front_port_position=1, rear_port=rearport6, rear_port_position=1, ), ]) @@ -2253,10 +2253,10 @@ class LegacyCablePathTests(CablePathTestCase): frontport2 = FrontPort.objects.create(device=self.device, name='Front Port 2') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport2, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), ]) @@ -2302,10 +2302,10 @@ class LegacyCablePathTests(CablePathTestCase): frontport2 = FrontPort.objects.create(device=self.device, name='Front Port 2') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport2, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), ]) @@ -2352,10 +2352,10 @@ class LegacyCablePathTests(CablePathTestCase): frontport2 = FrontPort.objects.create(device=self.device, name='Front Port 2') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport2, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), ]) @@ -2407,7 +2407,7 @@ class LegacyCablePathTests(CablePathTestCase): frontport1 = FrontPort.objects.create(device=self.device, name='Front Port 1') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), ]) @@ -2521,16 +2521,16 @@ class LegacyCablePathTests(CablePathTestCase): frontport4 = FrontPort.objects.create(device=self.device, name='Front Port 4') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport2, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), PortAssignment( - front_port=frontport3, front_port_position=None, rear_port=rearport3, rear_port_position=1, + front_port=frontport3, front_port_position=1, rear_port=rearport3, rear_port_position=1, ), PortAssignment( - front_port=frontport4, front_port_position=None, rear_port=rearport4, rear_port_position=1, + front_port=frontport4, front_port_position=1, rear_port=rearport4, rear_port_position=1, ), ]) diff --git a/netbox/dcim/tests/test_cablepaths2.py b/netbox/dcim/tests/test_cablepaths2.py index 44bf4f082..8a75fdcb5 100644 --- a/netbox/dcim/tests/test_cablepaths2.py +++ b/netbox/dcim/tests/test_cablepaths2.py @@ -365,7 +365,7 @@ class CablePathTests(CablePathTestCase): frontport1 = FrontPort.objects.create(device=self.device, name='Front Port 1') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), ]) @@ -443,16 +443,16 @@ class CablePathTests(CablePathTestCase): frontport2_2 = FrontPort.objects.create(device=self.device, name='Front Port 2:2') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1_1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1_1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport1_2, front_port_position=None, rear_port=rearport1, rear_port_position=2, + front_port=frontport1_2, front_port_position=1, rear_port=rearport1, rear_port_position=2, ), PortAssignment( - front_port=frontport2_1, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2_1, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), PortAssignment( - front_port=frontport2_2, front_port_position=None, rear_port=rearport2, rear_port_position=2, + front_port=frontport2_2, front_port_position=1, rear_port=rearport2, rear_port_position=2, ), ]) @@ -671,16 +671,16 @@ class CablePathTests(CablePathTestCase): ] PortAssignment.objects.bulk_create([ PortAssignment( - front_port=front_ports[0], front_port_position=None, rear_port=rear_ports[0], rear_port_position=1, + front_port=front_ports[0], front_port_position=1, rear_port=rear_ports[0], rear_port_position=1, ), PortAssignment( - front_port=front_ports[1], front_port_position=None, rear_port=rear_ports[1], rear_port_position=1, + front_port=front_ports[1], front_port_position=1, rear_port=rear_ports[1], rear_port_position=1, ), PortAssignment( - front_port=front_ports[2], front_port_position=None, rear_port=rear_ports[2], rear_port_position=1, + front_port=front_ports[2], front_port_position=1, rear_port=rear_ports[2], rear_port_position=1, ), PortAssignment( - front_port=front_ports[3], front_port_position=None, rear_port=rear_ports[3], rear_port_position=1, + front_port=front_ports[3], front_port_position=1, rear_port=rear_ports[3], rear_port_position=1, ), ]) @@ -750,10 +750,10 @@ class CablePathTests(CablePathTestCase): frontport2 = FrontPort.objects.create(device=self.device, name='Front Port 2') PortAssignment.objects.bulk_create([ PortAssignment( - front_port=frontport1, front_port_position=None, rear_port=rearport1, rear_port_position=1, + front_port=frontport1, front_port_position=1, rear_port=rearport1, rear_port_position=1, ), PortAssignment( - front_port=frontport2, front_port_position=None, rear_port=rearport2, rear_port_position=1, + front_port=frontport2, front_port_position=1, rear_port=rearport2, rear_port_position=1, ), ])